1. Field of the Invention
The present invention relates to techniques for performing mathematical operations within computer systems. More specifically, the present invention relates to a method and an apparatus for efficiently performing a square root operation in circuitry within a computer system.
2. Related Art
In order to keep pace with continually increasing microprocessor clock speeds, computational circuitry within the microprocessor core must perform computational operations at increasingly faster rates. One of the most time-consuming computational operations is a square root operation. Performing a square root operation involves finding the square root Q of a radicand R.
Computer systems often perform square root operations using a technique that iteratively performs subtraction and/or addition operations on a remainder calculated thus far, r, to retire a fixed number of bits of Q in each iteration.
Unfortunately, each iteration involves selecting and performing a number of addition and/or subtraction operations that require time-consuming carry completions. Hence, hardware implementations of existing square root techniques tend to be relatively slow.
What is needed is a method and an apparatus for performing a square root operation that takes less time than existing techniques.